Digital Camera Design Demonstration
3.7
Block Diagram of the Reference Design
The complete reference design is also located in the CD-ROM attached. Please
refer to the following diagram to help you in reading the code provided.
DATA
CMOS
Image
FVAL
LVAL
PCLK
MCLK
CMOS
Sensor Data
Capture
Bayer Color
Pattern Data
To
30-Bit RGB
VGA
Controller
And
Data Request
DATA
HS
VS
CLK
VGA
DAC
Sensor
SDAT
SCLK
I2C Sensor
Configuration
Multi-Port SDRAM
Controller
DATA
ADDR
CTRL
SDRAM
Core
Module
Board
Figure 3.8. The block diagram of the digital camera design
The below figure for DE4 only.
DATA
FVAL
DATA
CMOS
LVAL
PCLK
MCLK
CMOS
Sensor Data
Capture
Bayer Color
Pattern Data
To
30-Bit RGB
DVI
Controlle r
And
Data Request
HS
VS
CLK
DVI
TX
Image
Sensor
SDAT
SCLK
I2C Sensor
Configuration
Multi-Port DDR2
Read & Write Controlle r
DATA
ADDR
CTRL
DDR2
Core
Module
Board
Figure 3.9. The block diagram of the digital camera design for DE4
21
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